![]() ![]() Is using that bypass diode an acceptable way to set up a single connection for both charging and discharge? Would this cause any problems that you are aware of? Do I need back to back FET's? In my diagram (Q6) is Q1 and in order to allow both input and output of power on the SC+ power pin, I added the shotkey diode D1 to allow controlled charging by the BQ33100, but then allow power to freely flow back to the device during a power failure. TB1 is separated from the circuit using (Q6) to control the charge process. On the EVM, the input and output are separated on (TB1) and (J1). Power will be provided for charging when the main supply is working, and then we provide power out when that power goes away. We only have 1 pin for power in/out of the board.In my design since I only have 4 caps and per the datasheet on a 4P setup, I grounded VC5 and rerouted this voltage divider output to the VC4 pin which on my sheet is R21 and R22. In the eval datasheet, there is a voltage divider using (R32) and (R33) which connects to VC5. ![]() We based most of our design off the diagram on page 11 of the datasheet, and I'll refer to those component reference designators. Also, here is my design so far. While the EVM shows examples for a 5 cell setup, we have a 4 cell setup, and have a few questions that we can't answer using the datasheet and EVM user guide. We are working on a supercap backup circuit that uses the TI BQ33100. ![]()
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